Bluetooth systems and other wireless device-to-device communications electronics are integrated onto a single chip for reduced cost and package volume. Integration of a frequency-demodulation circuit and filter circuit results in rather poor absolute precision in, for example, resistance and capacitance values, in the integrated circuit. Therefore, demodulation sensitivity and frequency characteristics, among others, may differ from one integrated circuit to the other. This is because the frequency characteristics of the phase shifter, the filter circuit, and other components for use in a frequency-demodulation circuit are typically dictated by the product of the resistance value of the resistor and the capacitance value of the capacitor constituting those components. The discrepancy changes primarily depending on irregularities in the resistance and capacitance values and to a much lesser degree, on temperature, power supply voltage, and other operating conditions.
Accordingly, Bluetooth systems and like wireless communications devices supposed to receive burst signals are automatically adapted to adjust operation of the bandpass filter and frequency-demodulation circuit immediately before reception and maintain the resultant state during the reception, in order to achieve stable reception performance without adjustment. The reception lasts for a short period of time (a single packet is received in a few hundred microseconds), and it is safely assumed that during that period, the characteristics do not change substantially.
A well known technique to eliminate the characteristics discrepancy between integrated circuits is disclosed in Japanese published unexamined patent application 7-115328/1995 (Tokukaihei 7-115328; published on May 2, 1995). According to this prior art, there is provided a control circuit to a frequency-demodulation circuit composed of a phase shifter and a phase comparator, the control circuit controlling the characteristics of the phase shifter to stabilize demodulation sensitivity.
Although capable of eliminating characteristics discrepancy caused by the absolute precision of elements in the integrated circuit, the prior art is short of eliminating those caused by the relative precision of the elements. Also, the control circuit requires a reference circuit for adjustment which is structured similarly to the phase shifter and the phase comparator. This adds to circuit complexity, raising new problems.
In the same context, U.S. patent application US-2002-0135418 published on Sep. 26, 2002, which constitutes prior art, proposes a technique to eliminate the characteristics discrepancy caused by the relative precision without significantly adding circuit complexity. FIG. 8 is a block diagram showing an electrical construction of an FM signal receiver 1 according to the prior art document. An FM signal received at an antenna (not shown) enters the receiver 1 through an input terminal 2 and travels past a switch 3. The signal is then filtered off by the bandpass filter (BPF) 4 to produce a signal composed of only components in the bandwidth targeted in reception. The resultant signal is fed to a frequency-demodulation circuit 5. The frequency-demodulation circuit 5 is constructed from a F-V converter circuit. The demodulated signal is filtered by a low pass filter (LPF) 6 and amplified by an amplifier 7. The signal is then converted to digital in an analog-to-digital converter circuit 8 and supplied out from an output terminal 9 to, for example, a subsequent decoder circuit (not shown).
Attention should be paid to the provision of a reference signal generator circuit 10 and a control circuit 11 in the FM signal receiver 1 for the purposes of, as mentioned above, eliminating characteristics discrepancy due to relative precision without significantly adding circuit complexity. The circuit 10 is coupled with the switch 3. The control circuit 11 adjusts the characteristics of the BPF 4 and frequency-demodulation circuit 5. A phase shifter in the frequency-demodulation circuit 5 is constructed from circuitry similar or related to the BPF 4.
On every reception of a burst signal, the control circuit 11 operates the switch 3 to connect the reference signal generator circuit 10 and controls the phase shifter in the frequency-demodulation circuit 5 so that the output of the frequency-demodulation circuit 5 has a specified value. The circuit 11 controls the BPF 4 similarly. The switch 3 is then connected back to the input terminal 2, while the control circuit 11 maintains the characteristics of the BPF 4 and frequency-demodulation circuit 5 in the same controlled state. Thus, the control circuit 11 stabilizes the characteristics of the BPF 4 and frequency-demodulation circuit 5 in reception. By automatically adjusting the characteristics of the BPF 4 and frequency-demodulation circuit 5 in response to every reception of a burst signal in this manner, the integrated circuit becomes stable without adjustment.
However, problems do exist with the FM signal receiver 1 constructed as above: when the BPF 4 is adjusted in response to the automatic adjustment of the characteristics of the frequency-demodulation circuit 5, an offset error of the amplifier 7 between the frequency-demodulation circuit 5 and the control circuit 11 keeps the characteristics of the BPF 4 from being suitably adjusted even if the characteristics of the frequency-demodulation circuit 5 are appropriately adjusted. This in turn develops frequency characteristics discrepancy in the BPF 4, degrading the characteristics of the entire receiver system.
To be more specific, the amplifier 7 is provided to render the amplitude of the output signal from the frequency-demodulation circuit 5 to such a level that is suited to the input dynamic range for the analog-to-digital converter circuit 8. Suppose that when the amplifier 7 is free from offset, the characteristics of the frequency-demodulation circuit 5 and amplifier 7 connected in series are such that represented in FIG. 9(a). If so, when the amplifier 7 has a ΔV offset, the characteristics are such that represented in FIG. 9(b). As mentioned earlier, the frequency-demodulation circuit 5 is constructed from a F-V converter circuit. Let f0 be a reference signal frequency and V0 be a specified value, which serves as a reference, when the frequency-demodulation circuit 5 is controlled by the control circuit 11. When the amplifier 7 has no offset, the characteristics of the frequency-demodulation circuit 5 are controlled by the control circuit 11 so that they are represented by the solid line in FIG. 9(a). The BPF 4 is accordingly controlled as shown by the solid line in FIG. 10(a).
In contrast, when the amplifier 7 has an offset, the ideal characteristics of the frequency-demodulation circuit should be controlled as represented by the dash-dot line in FIG. 9(b), and those of the BPF 4 by the dash-dot line in FIG. 10(b). However, in actuality, the frequency-demodulation circuit 5 is controlled to have characteristics as represented by the solid line in FIG. 9(b), and the BPF 4 is accordingly controlled to have characteristics as represented by the solid line in FIG. 10(b).
Controlling the characteristics of the frequency-demodulation circuit 5 so that they are represented by the solid line in FIG. 9(b) does not cause serious problems. Meanwhile, controlling the BPF 4 so that they are represented by the solid line in FIG. 10(b) results in degradation in reception characteristics which is due to degradation of the reception signal and insufficient damping of signals in the adjacent channel. These are serious problems.